The invention relates to a command controller and a prefetch buffer, and in particular, to a command controller and a prefetch buffer for accessing a serial flash in an embedded system.
Embedded systems typically comprise flash memory such as serial flash or parallel flash for storing data and code. An embedded system requires a plurality of pins (address pins, data pins, and control pins) to access a parallel flash. Fewer pins are required to access a serial flash. For example, an embedded system only requires four pins (an enabling pin CE, a clock pin SCLK, a data input pin SI, and a data output pin SO) to access the serial flash. Additional commands and addresses, however, must be issued each time the serial flash is accessed. If the embedded systems access the serial flash too frequently, large number of additional commands and addresses will be issued and the performance of the embedded system may be decreased. Additionally, the serial flash is controlled by vendor specific instructions, which vary between manufacturers, resulting in compatibility problems.